Pre-Silicon Verification Engineer

Job Description
As an IP Verification Engineer, you will be responsible for verification of IPs and subsystem. The role includes
• Creation of testplan for IPs/Subsystem based on Specifications and Architecture documents.
• Development of verification components like BFMs, Scoreboards, Checkers and integrating them.
• Creating directed and random tests using Systemverilog randomization. Map test scenarios and analyzing the performance numbers.
• Creating coverpoints, analyzing and achieving the target goals of functional coverage metrics.
• Enabling validation platform automation using scripts.

Qualifications

• Bachelors or Master's degree in EEE, ECE or CSE, or equivalent with 3 to 9 years of experience in verification.
• Strong knowledge in Systemverilog/SystemC, constraint random stimulus generation, SV Assertions and Verification concepts.
• Exposure to any of the Formal Verification Tools.
• Hands-on experience in Functional coverage implementation and analysis.
• At least two year of relevant working experience using OVM/UVM Methodologies.
• Experience of working in any of the bus protocols like AHB, AXI, OCP etc.
• Knowledge on Image processing, Machine learning algorithms is a strong plus.
• Good scripting knowledge using Perl/Tcl.

Inside this Business Group
Intel AI, leveraging Intel's world leading position in silicon innovation and proven history in creating the compute standards that power our world, is transforming Artificial Intelligence (AI) with the Intel AI products portfolio. Harnessing silicon designed specifically for AI, end to end solutions that broadly span from the data center to the edge, and tools that enable customers to quickly deploy and scale up, Intel AI is inside AI and leading the next evolution of compute.

Legal Disclaimer:
Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.

IN Experienced Hire JR0111349 Bangalore


Meet Some of Intel's Employees

Martin S.

SoC Design Engineer

Martin uses his communication skills and technical knowledge to perform deep-level debugs of the intellectual properties that come to Intel.

Valerie P.

Principal Engineer, Data Center Group

Valerie’s job is to create a personalized network at the intersection of several technologies, from security to artificial intelligence to gaming.


Back to top