Job Description

• • Our team is responsible for Silicon level HW architectural validation and accountable to find design implementation bugs through post si system level validation
  • As a Post Silicon Validation Engineer ( Server and Client Microprocessor Hardware), you are required to create, define and develop system validation environment & test suites optimized for a CPU or its subsystems like memory controller, Power management, PCIe, USB/TCSS, Serial IO, Graphics, media, audio and other modules of given complexity. Uses & applies emulation & platform-level tools & techniques to ensure functionality & performance as per spec.
  • You are responsible for the development of test plans, execution of validation plans/ coverage, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.
  • You are responsible in validating the functionality of new architectural features of next generation designs by developing test plans, tests content, coverage points or test tools.
  • You are focal point among  Architecture, Design, System software developers and Validation teams within Intel and across different sites.

• • Bachelor's/Master's in Hardware Engineering or Electrical/Electronics Engineering or Computer Engineering or Computer Science with minimum 7 years to 10 years (Domain Lead position) of related work experience.
  • Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below
  • Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intel's Core and Uncore or equivalent architecture.)
  • Solid understanding of one of the following domain Industry spec, associated technologies and architecture:
  • Deep understanding of Graphics, media, Audio, Camera interface, imaging and printing , flash storage technology architecture and debug.
  • Solid understanding of the Validation and Debug flows of a complex CPU Silicon:
  • Knowledge on Validation/ Debug Flows and overall SOC Architecture.
  • Pre-silicon Design / Validation knowledge is a value add.
  • Good working knowledge in C++/Python SW programming for content development and scripting.
  • Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus.
  • Excellent written and oral communications and experience working in a cross functional team environment are essential.
  • Good Team Player.
  • Processes strong problem solving, analytical and debug skills.