You will be part of Intel Design Enablement (DE) focused on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design across all generations of Intel process technology.
At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors and product design teams to develop and deliver high quality technology collaterals, models and enablement of EDA tools.
As a member of this team, your responsibilities include (but not limited to):
- Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement
- Memory bitcell and complex periphery IC layout and automation
- Memory array/IP design, memory circuit innovation, testchip design/execution/validation
- Pre/post-Si validation/debug to enable yield and parametric tracking/ramp
You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.
MS degree in Electrical Engineering, Computer Engineering or a related discipline with 2+ years experience OR PhD in Electrical Engineering, Computer Engineering or a related discipline.
Experience in the following:
- ASIC design flow and validation
- CAD tools/flows for digital and/or analog design
- CMOS custom circuit design, simulation, layout design and verification
- Design, characterization and verification of custom memory (SRAM, Register File, ROM) circuits
- Design trade-off of power, performance and area
- Design technology co-optimization
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
US Experienced Hire JR0150617 Hillsboro Technology and Manufacturing