Memory Design Engineer
You will be part of the Corporate Memory Organization memory compiler team and will own significant engineering tasks in a fast-paced and technically challenging environment.
Responsibilities would include but are not limited to:
- Provide design solutions for meeting challenging memory design specs for various product segments
- Memory Compiler Design Flow/Methodology development
- Design, validation and characterization of Memory Compilers
- Interfacing with customers
Behavioral traits for this position include logical thinking, good verbal/written communication/interpersonal skills, ability to prioritize work/multitask, good analytical and problem solving skills.
- Must have a BS, MS or PhD in Electrical Engineering
- Minimum 4 years' experience with scripting (Perl, tcl etc.) to develop the compiler and support or enhance the tool as required
- Minimum 5 years' experience in memory design convergence tools including: formal equivalence verification, static timing methodology, electrical reliability and robustness analysis
- Minimum 5 years' experience with transistor level operation, memory bitcell design, design challenges under process variations and low power circuit techniques
Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.
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