FV Intern - Automation Enabling

Job Description
• As a Functional Validation Intern, your responsibilities are oriented to support HW Development activities led my Engineering team. The focus is to support (but not limited) on:
- Emulation of chipsets
- Test Content development for Pre Si and Post Si
- Testing Strategy participation
- Debug of chipset issues paring with Experienced Engineers
- Communicate progress & status to Validation Chief Engineers


• As a Functional Validation Intern, you will gain experience in a different sort of areas which should be supported by:
- Computer Architecture bases.
- FPGA usage and programming.
- Emulation flows and tools.
- Micro-controller architecture and usage
- Programming skills in C/C++, Python.
- Knowledge of Linux and Windows OS architecture and kernel programming.
- Digital and Analog Electronics

• The activities are measured by delivering objectives in terms of quality. Your soft skills are expected to support:
- Teamwork - work as a member of a SCRUM using Safe/Agile methodologies
- Strong commitment - Deliver objectives
- Discipline - Quality commitments (Accurate, Complete, On time).
- Leadership / Motivation - is a plus but you must be ready to become a leader.
- Presentation skills - create documents and slides to share ideas
- Project Management - is a plus but you should be perceived organized and balanced.
- Communication - clear ideas, fluent English.

Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.

MX Intern JR0118336 Guadalajara

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