- Bangalore, India
You will be required to partition a design block of chip into multiple FPGAs at right design boundaries, create FPGA wrappers / convert some of ASIC libraries (memories, clocking etc.) to FPGA libraries, by going through FPGA flow create FPGA binaries and validate the FPGA binaries on board
You must be having BS or MS in Electrical OR Electronics engineering.
Should have minimum of 5 years of experience in FPGA architecture and FPGA based flows.
Should have good RTL design, digital and timing concepts, ability to analyze the circuits.
Should possess strong problem solving skills and debug the failures to root cause, if any of steps in FPGA conversion is the root cause or dormant Functional bug.
Desirable to have experience in Intel Architecture based SoC, Networking domain knowledge, high speed serial interfaces and memories (DDR3/DDR4 etc.)
Experience with Shell scripting.
Strong written and verbal communication skills
Should have minimum of 5 +years of experience in FPGA architecture and FPGA based flows.
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
IN JR0137130 Bangalore
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