Failure Analysis R and D engineer
- Responsible for developing tools and solutions for the Intel worldwide labs to debug Intel microprocessors and/or chipset in order to improve yield, quality and reliability. FATD engineers have the opportunity to be constantly exposed to the latest Intel product technology ranging from architecture, circuit to Design-For-Test (DFT) and Design-for-Debug (DFD).
- Responsibilities as a Board NPI Engineer will include but not be limited to:
- Exploring Intel new products' DFTs and DFDs that are required for developing FA tool suite for current and new methodologies.
- Pathfinding on the solution at board and hardware level to support and enable various testing capabilities eg. Scan, Cache, IO, SBFT etc.
- Work with Board design team to develop board and also new FA platform to support new products.
- Support hardware setup and debug locally and also remotely
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
MY JR0096385 Penang
Meet Some of Intel's Employees
Martin S.SoC Design Engineer
Martin uses his communication skills and technical knowledge to perform deep-level debugs of the intellectual properties that come to Intel.
Back to top