Chipsets Logic Design Micro-Architect
- George Town, Malaysia
Seize the opportunity to work with the team responsible for RTL logic design and micro-architecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team is part of the Chipsets Silicon Group (CSG) within Client Engineering Group and are responsible for developing Soft IPs, Subsystems and Gaskets for client and server chipsets.
As a Chipsets Logic Design Micro-Architect, a typical day may include, but is not limited to:
- Developing Micro-architecture specifications and participating development of Architecture specifications for the Logic components, and subsystems with SIP-HIP inter-operability design and validation.
- Performing logic design, Register Transfer Level (RTL) coding, and formal verification.
- Providing IP integration support to SoC customers and represents RTL team.
- Performing tools and flows to qualify the logic implemented, such as RTL/DFx linting, clock/reset domain crossing check, synthesizability check to meet design QoR, timing constraint definition and review, gate-count/power optimization, etc.
- Reviewing verification plan and implementation to ensure the design features are verified per specifications.
- An excellent communicator
- Extremely organized
- A team player who loves to collaborate
- A strong technical leader who communicates well with great influencing skills
- Passionate for design/tools and methodology
- Someone who meets their commitments
- Someone who wants to make a difference through technology
- Open to new ideas and methodologies
- A collaborative team demonstrating the best teamwork across Intel
- Here to help you succeed
- People who want to do innovative things
If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.
The candidate must possess a minimum of Bachelor Degree in Electronics Engineering, Computer Engineering, Computer Science, or equivalent.
o 7+ years of relevant logic design/pre-silicon verification experience with multiple project cycles
o 7+ years of logic design/pre-silicon verification experience with various tools and methodologies including but not limited to:
- System Verilog
- Python/Perl/Shell scripting
- VCS/Synopsys simulators
- interactive debugger
- RTL model build
- testbench development
- power-aware simulation
- Design Compiler, DFT Compiler, PrimeTime, PrimePower, etc physical implementation and sign off toolings
- coverage-based random constraint simulation
o 5+ years of PC Architecture experience
o 1+ years of experience in developing micro-architect specifications based on High Level Architecture specifications
o 1+ years of experience in SIP-HIP interoperability design and verification
o Capable in developing test plan and contents and coverage points for validation purpose based on High Level Architecture specifications
o VLSI or Structural and Physical design flow/methodology experience
o Power management, UFS, SPI, USB, PCI express or any industry standard BUS protocol experience
o Strong analysis, debugging skills, and creative in problem solving
o Strong chipset/CPU level understanding required on power consumption, power estimation and low power design methods
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
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