Job Description
Become a key member of a team participating in the design of Atom CPUs. We are looking for a talented individual to manage a high performing team in the physical design of highly complex blocks from synthesis/APR through post-layout verification and tapeout. This technical management position requires an engineer with broad APR design and verification experience and a strong desire to lead a team of experienced integration engineers.
Responsibilities for this position will include but not be limited to:
- Manage a team of design engineers responsible for RTL to GDS activities.
- Plan, allocate resources, assign tasks and direct activities of the team to meet aggressive schedules and achieve milestone criteria.
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- Identify and analyze progress gating issues and implement plans, tasks, and solutions to quickly resolve.
- Propose creative, innovative methodology and process initiatives to consistently improve efficiency and quality of integration deliverables.
- Provide coaching, guidance and feedback to direct reports on career development, performance, and productivity issues.
- Build a strong and technically vital organization. Cultivate and reinforce appropriate group values, norms and behaviors.
Qualifications
- The successful candidate must possess a minimum of a BS or MS in Electrical Engineering or Computer Engineering with at least 7 years of hands on experience in this area and at least 3 years of experience in leading a team either as technical lead or as manager.
Additional qualifications include:
- Hands-on experience in the following areas:- Block floorplanning, RTL to gate level netlist generation through synthesis, DFT insertion. placement, clock tree synthesis and route flows, power and static timing analysis and closure, validation of physical design including timing, electrical rules, DRC/LVS, noise, electromigration checks, formal equivalence verification.
- Successfully led one or more design tape-outs of complex, high performance, low-power CPUs.
- Able to provide technical leadership to a team of engineers involved in RTL to GDS APR build and verification flows.
- Able to provide technical guidance and support to team members throughout the project design cycle.
- Excellent verbal communication, technical presentation and leadership skills. Self-motivated and well organized.
- Candidate should be familiar with Synopsys tools.
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
Other Locations
Malaysia, Kulim
MY Experienced Hire JR0142019 Penang