Analog Engineering Manager

    • Santa Clara, CA

Job Description
Directs and guides the activities of research or technical design function responsible for designing, developing, modifying, modeling and analyzing analog and mixed signal electronic parts, components, interconnects, or integrated circuitry for electronic equipment and other hardware systems. Evaluates final results of research and development projects to assure accomplishment of technical objectives. Prepares and presents reports outlining the outcome of technical projects and makes recommendations for actions necessary to achieve desired results. Selects, develops, and evaluates personnel to ensure the efficient operation of the function.
This role is focused on defining the architecture for enabling next generation high speed PHY's like DDRIO, PCie, Power Circuits.

Description: In depth knowledge of circuits required, include High speed serial interfaces, Memory interfaces like DDR/LPDDR, High Speed low power serial I/O's, PLLs, Power circuits, equalizations techniques, ADC's. etc. Responsibilities will include schematic capture, circuit simulation, circuit layout, LIB/LEF generation, low power optimization, low power validation, Mixed signal validation, IBIS modeling and signal integrity. Design and characterizations of analog circuits , knowledge of process technology.

Qualifications

Minimum Requirements:
- Candidate should have a MS or PhD in Electrical Engineering or Computer Engineering, and a minimum of 10 years of experience in analog or mixed-signal circuit design
- Familiarity with tools/flows used for schematic entry, netlist generation, spice simulation, layout implementation, and parasitic extraction.
- Ability to navigate in Linux computing environment.

Additional Preferred Requirements:
- Familiarity with analog design tools
- Automation/scripting proficiency
- Strong communication skills (verbal and written)
- Strong teamwork skills and the capability of performing in a dynamic work environment
- Ability to be flexible between multiple roles throughout the life of the project
- Aging Reliability, Noise analysis, IR Drop, ASIC design flows, Hard IP design flow
- Design tools knowledge : Cadence, Synopsys DV/VCS, HSpice, Netlist, Matlab

Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Other Locations

US, California, Folsom;US, Oregon, Portland

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.... US Experienced Hire JR0137950 Santa Clara


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