We are seeking a talented analog designer to join our excellent design team. In this role you will have a chance to define, design, implement and test analog and mixed signal circuits, like high-speed high-performance transmitters and receivers, LDOs, ADCs and DACs, OPAMPs, and comparators. You will be developing state of the art high-speed, low-power wireline transceiver PHYs for some of Intel's highest-volume product lines.
Responsibilities may include, although not limited:
- Be involved in high-speed I/O design
- Take responsibility of a design bottom to top
- Work closely with mask design engineers to optimize design performance at circuit and full-chip level
- Propose and implement creative design approaches
- Document and review the expected and achieved results
- Work closely and collaborate within a team with expert analog designers and experienced layout designers
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
The candidate must have a Master's degree in Electrical Engineering with 6+ months of experience - OR - a PhD in Electrical Engineering with:
- Semiconductor device and technology, deep submicron IC design methodology and common EDA tools
- Motivation to skills development in high-speed/Analog/Mixed signal design
- High-speed Analog IO designs, PHY architectures, and tradeoffs
- Circuit design tools such as Virtuoso, HSPICE, and Finesim
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
US College Grad JR0154822 Santa Clara IP Engineering Group (IPG)