Sr Field Progammable Gate Array (FPGA) Verification Engineer

Job Description
As an IBM FlashSystem verification engineer, you join a talented group of engineers responsible for designing and validating the next-generation Enterprise class all-flash storage arrays. We are looking for an experienced professional who is passionate about design verification, both unit-level verification and top-level verification. In this role you will apply your technical knowledge to solve complex verification scenarios utilizing pure simulation environments as well as in-lab hardware prototype platforms.

As an experienced member on our diverse engineering team, you will take on the latest high performance storage system verification. You will be part of a growing organization with a market-leading product and a strong plan for continued future growth. Our team uses the latest tools and methodologies with an eye for innovation and creative problem solving.

Responsibilities:

The design verification team owns the verification of the FPGA designs and development of related infrastructure. The team is responsible for the quality of delivery through the entire design phase.

Develop SystemVerilog and UVM verification environments for block-level and top-level modules.
Build and maintain verification plans
Write and run testcases for RTL simulation
Debug functional errors in the RTL by working closely with design and firmware engineers.
Define and implement functional coverage, and improve DV environment to ensure coverage closure

Requirements:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
A minimum of 5 years of experience in design verification
Hands on experience with building a UVM environment from the ground up
Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms
Experience with functional coverage and constrained random verification methods

This position is located in Houston Tx.

Required Technical and Professional Expertise

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
A minimum of 5 years of experience in design verification
Hands on experience with building a UVM environment from the ground up
Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms
Experience with functional coverage and constrained random verification methods

Preferred Tech and Prof Experience

  • 10+ years experience with RTL design and verification of RTL ( Register Transfer Level ) / FPGA's ( Field-programmable gate array)
  • 5+ years experience using Verilog or SystemVerilog languages.
  • 5+ years experience using Xilinx tools (Vivado: Synthesis, PAR, STA).
  • Familiarity using Cadence Incisive Simulator.
  • Lab experience using Oscilloscope and Logic Analyzer.
  • Knowledge of Linux operating system and drivers .


EO Statement
IBM is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.


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