Silicon Performance Architect

Oculus Research, the research division of Oculus (Facebook), is looking for a Silicon Performance Architect who will work with a world-class group of researchers and engineers. This ideal candidate will understand the full spectrum of silicon performance modeling, analysis, and projections from algorithms on generic compute units to custom silicon IP blocks, traditional compute benchmarking, and SoC and System level implications.


  • Define performance architecture that includes functions such as image compute, CPU/GPU benchmarking, throughput and QoS analysis, performance trace architectures and detailed modeling and analysis.
  • Surpass state of the art for metrics such as compute, bandwidth and power consumption.
  • Work across disciplines, brainstorm big ideas, build new methodologies, juggle/coordinate multiple initiatives, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product.
  • Understand the tradeoffs between general purpose and custom compute mechanisms, be able to model data-flows, and create detailed cost/benefit analysis.
  • Guiding a small team of other Architects in undertaking performance analysis, modeling, and projections.
  • Produce detailed documents and SystemC models matching the proposed ASIC implementation, and produce detailed tradeoff analyses for executive review and product roadmap decisions.
  • Plan and document Performance test plan for silicon.
  • Works effectively as an individual and in a multidisciplinary international team.
  • 7+ years of experience as a Performance Architect for production silicon shipped in volume.
  • Experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution.
  • Experience evaluating architectural trade-offs such as speed, performance, power and area.
  • Experience employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary system issues.
  • MSEE/CS or equivalent experience.
  • Ability to collaborate and/or lead in a team environment.
  • Knowledge of industry trends and disruptive technologies.
  • Experience in top down high-level-model to HW mapping.
  • Programming in C or C++ experience.
  • Experience with DSP coding and optimization.
  • Capable of dealing with ambiguity with a fast changing consumer electronics field.
  • Results oriented, self-motivated, proactive with demonstrated creative & critical thinking.

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