Research Scientist, AI Research (PhD Student or Grad)
Facebook's mission is to give people the power to build community and bring the world closer together. Through our family of apps and services, we're building a different kind of company that connects billions of people around the world, gives them ways to share what matters most to them, and helps bring people closer together. Whether we're creating new products or helping a small business expand its reach, people at Facebook are builders at heart. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities â€" we're just getting started.
Facebook Reality Labs (FRL) is the world leader in the design of virtual and augmented reality systems. Come work alongside expert engineers and research scientists to create the technology that makes VR and AR pervasive and universal. Join the adventure of a lifetime as we make science fiction real and change the world.
We are seeking a Research Scientist to support development of state-of-the-art deep learning hardware components optimized for AR/VR systems. The successful candidate will be part of our efforts to architect, design and implement the hardware platforms for this activity and will be part of a team that includes algorithm, user experience, software, firmware and ASIC experts. The ideal candidate will understand the full stack from algorithms and architecture down to hardware accelerator blocks. This is a full-time position based in Menlo Park, CA.
- Enable new user experiences in AR/VR via innovative applications of deep learning techniques for body tracking, user interface and other use-cases
- Develop a system hardware design that includes camera image processing, neural nets and custom compute processing blocks which will surpass state-of-the-art metrics for compute resources, DRAM bandwidth and power consumption
- Work with algorithm research teams to map CNN graphs to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance
- Support all phases of Silicon SoC development from a deep learning perspective - from early definition on through specification, architecture, layout and production
- Work with other groups to produce an FPGA test platform to test, develop and optimize the full system
- Contribute to execution of our silicon technology/compute roadmap to make advances in performance, power consumption and form factor
- Assess and recommend emerging technologies through partnerships with external suppliers
- Employ the scientific method to evaluate performance and to debug, diagnose and drive resolution of cross-disciplinary system issues
- Publish and present research at leading AI workshops and conferences
- Currently has or is in the process of obtaining a PhD degree or completing a postdoctoral assignment in the field of Machine Learning, Artificial Intelligence, Computer Vision or similar
- Available to start employment on or after February 1, 2019
- Must obtain work authorization in country of employment at the time of hire, and maintain ongoing work authorization during employment
- Experience in mobile SoC low-power design and architecture methodologies
- Hands-on experience in deep learning algorithms and techniques, e.g., convolutional neural networks (CNN), recurrent networks (RNN) and/or related areas
- Experience with custom SoC design especially as it relates to integration of hardware IP blocks, on-chip buses, DRAM bandwidth and power constraints
- Software design and programming experience in C/C++ for development, debugging, testing and performance analysis
- Interpersonal experience: cross-group and cross-culture collaboration
- Experience in real-time processing for computer vision and user interaction tasks, high-compute/throughput systems and using simulation and modeling technique to estimate performance and power
- Experience implementing deep neural networks for low-power SoC
- Experience with industry trends and technologies for optimizing CNNs to reduce DRAM bandwidth requirement, on-chip storage and compute requirements
- Proven track record of achieving results as demonstrated by grants, fellowships, patents, as well as first-authored publications at leading workshops or conferences such as ISSCC, VLSI Symposium, NIPS, ICML, CVPR, or similar
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Yumeng T.Research Scientist
Yumeng spends her days working with machine learning models for search products and completing product-level coding projects.
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