Graphics Pipeline Architect

Facebook Reality Labs, or FRL, focuses on delivering Facebook's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Facebook Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms.
We are currently seeking a world-class Graphics Pipeline Architect to support the development of the hardware component of a custom graphics pipeline optimized for AR/VR systems. The successful candidate will be required to design custom ICs/ASICs in close collaboration with the groups developing the algorithms, system software and SoCs.
This is a full-time position based in our Redmond office, WA, USA.

RESPONSIBILITIES

  • Collaborate closely with the graphics software architects and the SoC designers to support the realization of the necessary hardware to enable innovative AR/VR experiences.
  • Support all phases of Silicon SoC development from a graphics pipeline perspective from early definition on through specification, architecture, layout and production.
  • Develop algorithms and other technologies for driving current and future head mounted displays under real-time constraints.
  • Design, simulate, and test of an ASIC/SoC to realize the graphics pipeline design.
  • Work with other groups to produce an FPGA test platform to test, develop and optimize the full system.
  • Contribute to execution of our silicon technology and compute roadmap to make beyond state-of-the-art advances in performance, power consumption and form factor.
  • Assess and recommend emerging technologies through close partnership with external, industry leading suppliers.
  • Employ the scientific method to debug, diagnose and drive the resolution of complex, cross-disciplinary system issues.
MINIMUM QUALIFICATIONS
  • 10+ years of experience in digital IC architecture/design supporting real-time computer graphics, including GPU hardware or the graphics pipeline
  • Experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution
  • Experience in evaluating architectural trade-offs in speed, performance, power, area
  • Experience in employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary system issues
  • MS in EE/CS or equivalent
  • Experience in both ASIC/SoC design methodologies
PREFERRED QUALIFICATIONS
  • Experience in top down high-level-model to HW mapping
  • Knowledge of industry trends and disruptive technologies
  • Programming experience in C or C++
  • Ability to collaborate and/or lead in a team environment
  • A proven track record of innovation in graphics pipeline architectures and associated algorithms
  • Experience with non-conventional graphics pipelines
  • Ability to communicate and demonstrate ability for cross multi-disciplinary boundaries to drive optimal system solutions
  • Experience in advanced image synthesis, including light transport, sampling and reconstruction
  • Experience working with hardware and/or FPGA systems
  • Ability to operate autonomously, with only high-level direction
  • Capable of dealing with ambiguity with a fast changing consumer electronics field
  • Results oriented, self-motivated, proactive with demonstrated creative & critical thinking skills


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