ASIC & FPGA Engineer

Facebook's mission is to give people the power to build community and bring the world closer together. Through our family of apps and services, we're building a different kind of company that connects billions of people around the world, gives them ways to share what matters most to them, and helps bring people closer together. Whether we're creating new products or helping a small business expand its reach, people at Facebook are builders at heart. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities - we're just getting started.

Facebook is seeking a silicon design engineer to join our Infrastructure team. We are looking for candidates with expertise in architecting and designing semi-custom and fully custom ASICs. The role involves evaluating, developing and driving next generation technologies within Facebook. The candidate would need to work with software and system engineers to understand limitations of current hardware and use their expertise to build custom solutions targeted at multiple verticals including AI/ML, compression, and video encoding. This position is full-time and located in our Menlo Park office.


  • Micro-architecture definition, trade off analysis for PPA
  • Prototyping ideas with simulation and/or FPGA
  • Work with the SW and HW teams to understand the requirements and constraints
  • Setting up flows to improve ASIC development efficiency
  • BS degree in Computer Science, Electrical Engineering or other technical field.
  • Experience in supporting the development of RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or SystemVerilog) and debug the design via simulation tools.
  • Experience with micro-architecture, low power design
  • Experience with synthesis
  • MS or PhD in Computer Science or Electrical Engineering with a focus on Computer Architecture and/or VLSI
  • Experience with arithmetic unit design and numerics
  • Experience with Verilog
  • Experience with EDA tools for synthesis, simulation, floor planning
  • Experience with performance analysis
  • Experience with FPGA design flow
  • Experience with backend flow

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