Principal Hardware Engineer
- Designing high complexity FPGA/SoC systems using Cadence Allegro front-end tools employing constraint-driven front-to-end design flow
- Instituting process methodologies to enable efficient design/development and ensure introduction of "First time right" products
- Interacting with various vendors, component manufacturers and others for product design
- A minimum of 7 years recent experience in H/W design and development of systems having FPGAs or complex CPUs, switch mode power supplies, RF and analog circuits, NAND flash and DDR2/DDR3/DDR4 memory.
- Understanding of high speed signal integrity and power integrity issues; experience with analog circuit simulators such as SPICE, SPECCTRAQuest or Hyperlynx.
- Ability to operate in dynamic, fast-paced environment with minimal supervision.
- Lab experience with test equipment including logic analyzers, oscilloscopes for development and troubleshooting.
- Bachelor's degree in CE, CS or EE, MS preferred, or equivalent industry experience.
- Working knowledge of high speed PCB layout guidelines.
- Proficiency in Cadence PCB design front-end tools: Allegro Design Authoring and Allegro Connectivity Manager
- Proficiency in Cadence PCB simulation tools
- VHDL knowledge and design experience
- Experience with low level Linux components
- Working knowledge of high volume production processes including manufacturing and test
- Working knowledge of industry and agency standards, requirements, and approvals.
- Good analytical skills and problem solving skills
- Analog design experience; op-amps, LNAs, FETs, power supplies, ADCs , DACs and control systems based on embedded processors or microcontrollers.
Meet Some of DAQRI's Employees
Jennifer works on the Core Apps Team on the Smart Helmet, which means she helps develop and deliver the software applications that are available for the product's users.
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