Posted: Dec 1, 2020
Weekly Hours: 40
Role Number: 200209282
Would you like to join Apple's growing wireless silicon development team? Global Navigation Satellite Systems (GNSS) space vehicles transmit the power of a lightbulb, they are 13000 miles away, and are moving four kilometers per second. The received signals are commonly one hundred times weaker than cosmic microwave background radiation left over from the Big Bang and arrive next to interfering signals ten billion times stronger, just few MHz away. Our GNSS team is part of Apple's wireless SOC team. We are a vertically coordinated engineering team spanning RF, mixed signal analog design, Systems Engineering, RTL design, Design Verification, firmware and software engineering, test, and validation. Our focus is on highly energy efficient and robust GNSS receiver design. We develop GNSS technology that touches hundreds of millions of lives, something we are passionate about. We'd like you to consider being a part of our team. As a RTL Digital Design Engineer, you will be at the center of the Cellular GNSS silicon design group in a meaningful role, delivering products with outstanding GNSS performance with ultra-low-power when we can and exceptional robustness when it's needed.
- 4+ years' experience with power efficient GNSS RTL design with knowledge in modern design techniques and energy-efficient/low power logic design.
- Strong foundation in computer architecture including one or more of the following: Bus fabric, especially APB/AHB/AXI, tiered memory systems, system debug architecture, power management with multiple power domains, integer and floating-point numeric units, high-speed data path and control units.
- Proven track record for bringing logic designs into mass production and driving strong production test/QA methodologies is preferred.
- Excellent verbal and written communication skills with a desire to understand how things work at the most fundamental level.
- Experience with FPGA or emulation platform is a plus.
In this role, you will develop signal processing intensive design for GNSS SoCs, including: - Microarchitecture definition - RTL design and implementation - GNSS Measurement Engine design with baseband knowledge - IC Synthesis, STA, timing methodologies and constraints - IP integration, RTL logic design, and verification support - Running tools to ensure lint-free and CDC clean design - Collaboration with system/algorithm and firmware team to ensure performance and power efficiency
Education & Experience
A MSEE with focus on digital communication, signal processing, or systems theory is required. A Ph.D. in related areas of signal processing is desired.