Front-End Methodology CAD Engineer - Lint/CDC/RDC/BIST/Scan Codec & Integration

    • San Diego, CA

Summary

Posted: Dec 17, 2019

Role Number: 200001406

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a Front-End Methodology CAD Engineer, you will play a major role in promoting a reliable work environment for developing, maintaining and improving our Lint, Clock Domain Crossing (CDC), and Reset Domain Crossing (RDC) applications for our SoCs across multiple design sites. In addition, you will have the opportunity to write and support software and scripts that teams use to insert Memory BIST/BIRA and scan codecs into designs, verify those systems.

Key Qualifications

  • We typically require at least 5+ years of relevant experience
  • Familiarity with Memory BIST, DFT implementation and synthesis flows
  • Excellent communication skills and prior experience in supporting VLSI flows
  • High degree of comfort in co-developing an existing, integrated debug system
  • Expertise in TCL and/or PERL is required
  • Experience in Verilog and System Verilog is required
  • Understanding of FE design flow is required
  • Source control system management (Perforce) is a plus
  • Experience in Clock-Domain-Crossing (CDC) solutions and Reset-Domain-Crossing (RDC) solutions is helpful
  • Knowledge in Spyglass a plus


Description

In this highly visible role, you will be: - Responsible for developing, enhancing, and maintaining our CDC application for our SoCs across design sites - Developing, maintaining, and improving existing solutions for RDC flows and support the design team - Developing and maintaining an existing system for BIST insertion and DFT structure verification. - Responsible for supporting multiple DFT and design teams. - Utilize your debugging experience to debug vendor tool problems and collaborate with designers to help solve their problems - You will work closely with EDA vendor representatives to drive improvements and new methodologies - You will participate in the automation of project creation and version control system work flows

Education & Experience

MS/BS Degree in a technical discipline

Additional Requirements


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