Analog Mixed-Signal Design Engineer
- Cupertino, CA
Posted: Oct 25, 2018
Weekly Hours: 40
Role Number: 200003517
Imagine what you could do here at Apple? Together we could help craft the next generation of the world's finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your career, and there's no telling what you could accomplish. The team is searching for a self-motivating, passionate electrical engineer for the role of AMS Design Engineer. As a team, we will be working on the leading-edge technology nodes to build elite custom analog designs used to connect ourworld-class products to the physical world as well as enable optimizing their performance. You will become part of a hands-on development team that fosters engineering excellence, creativity and innovation. Collaboration across teams is a key component of success at Apple. You will work with us from Apple's headquarters in Cupertino, California. Dynamic, smart people and inspiring, innovative technologies are the norm here. Will you help us design the next generation of revolutionary Apple products?
- Understanding of data converter architectures and design trade-offs.
- Solid experience with bandgaps, bias, opamps, switched-cap circuits, LDOs, low power oscillators, PLLs, feedback and compensation techniques.
- Experience in design for ESD compliance and safety.
- In-depth knowledge of mixed-signal design techniques.
- Good knowledge of high precision techniques in presence of device mismatch.
- Experience in C/Matlab/VerilogA modeling.
- Strong device physics knowledge as it applies to analog IC design.
- Hands-on experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs.
- Experience in working with production test engineers to produce test plans and design for testability details.
Conduct transistor-level feasibility study for various Analog/Mixed-Signal circuit blocks. Design blocks and document design simulation and verification towards formal design reviews. Drive mask design to implement layout views of designs and drive layout reviews. Run post-layout and top-level simulations to validate top-level integration. Define production and bench-level test plans. Take lab measurements to validate performance compliance with the spec. Drive and review yield/lab test results for bug fixes.
Education & Experience
MS, preferred in EE
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