Apple

Analog IP Lab Validation and Characterization Engineer

1 week agoCupertino, CA

Summary Posted: Feb 23, 2022
Weekly Hours: 40
Role Number:200201354

At Apple, we work every single day to craft products that enrich people's lives. Do you love leading teams on challenges that no one has solved yet? Do enjoy working with cross-functional teams to deliver IP solutions for products that impacts customers' lives? We have an opportunity for a visionary and especially talented senior validation and characterization lead to lead a small team of lab engineers. As the leader of an IP validation team, you will have the rare and rewarding opportunity to validate innovative AMS IP in Apple's products that will delight and inspire millions of customers. Besides guiding this team, you will also play a very hands-on role in debug, stressing, and data science on the performance of AMS IP for Apple's world-class SOCs.

Key Qualifications

* The ideal candidate should have experience with and expertise in the following:
* Interop testing, debug, and characterization
* Familiar with industry standards for interfaces at the electrical and protocol levels
* Probing techniques and signal integrity of high-speed transmission lines
* Excellent programming skills, Python preferred, tcl and C/C++
* Expertise with electronic measurement, protocol analyzers/exerciser equipment
* High speed electronic measurements, time and frequency domain instruments
* Experience in the following areas is desirable:
* 10+ years of experience in characterization of complex high speed IP such as
* SERDES
* PLL
* DDR memory interfaces
* Data converters
* Precision sensors

Description
In this role, the key responsibilities are the following: Lead a focused team of AMS characterization and validation engineers. Characterize, analyze and debug analog IP for SOCs. Work closely with logic and circuit design, SOC, Product, and test engineering Develop deep understanding of details of the IP architecture/design Develop understanding of the application of the IP in an SOC/System Collaborate with design team to improve test/debug architecture Define and develop methods for stress testing to identify IP failure limits Plan and execute electrical, stress and interoperability characterization of analog IP Lead bring-up, debug, characterization and mass production ramp Drive development of measurement tools and automation of high-performance IP

Education & Experience
BSEE, BS-ECE is required MSEE, MS-ECE is a plus Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

Additional Requirements

Client-provided location(s): Cupertino, CA, USA
Job ID: apple-200201354

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