FPGA Senior Staff Engineer
- Phoenix, AZ
As part of Accenture's Industry X, the Silicon Design group is a diverse team of world class silicon engineers. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture engineers are true "Silicon to SW" Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.
Whether at our Silicon Design Center in Phoenix or at one of our other locations you will get to collaborate and innovate with the world's leading product development companies. In our dynamic fast-paced environment you will get to make the impossible possible.
Accenture is invested in our team member's growth and provide many opportunities for training and skills expansion.
The FPGA Engineer will require:
- Hands-on experience to write synthesizable RTL for FPGA based systems
- Integrating first-party and third-party IPs into a larger system and maintaining it through fast transitions
- Build vendor-neutral FPGA/RTL designs intended to prototype ASIC implementations
- Familiarity with Xilinx, Altera FPGA's((Vivado, Quartus, etc.)
- Perform FPGA design verification and validation using advanced RTL verification techniques
- Design FPGA's through the life cycle including: Architecture development, micro architecture, algorithm implementation, synthesizable Verilog code generation
- Perform FPGA Design Implementation: Constraint driven FPGA Synthesis, place and route, static timing analysis and optimize FPGAs for timing closure
- Collaborate in a team environment across multiple engineering disciplines and with researchers
- Generate design review and deliverable documentation including review packages, block diagrams, interface control documents, test procedures, requirements verification matrices, and test plans/procedures
- Proficient in control and use of a variety of test equipment including Oscilloscopes, Spectrum Analyzers, and Signal Generators
For now, all Accenture business travel, international and domestic, is currently restricted to client-essential sales/delivery activity only.
Please note: The safety and well-being of our people continues to be the top priority, and our decisions around travel are informed by government COVID-19 response directives, recommendations from leading health authorities and guidance from a number of infectious disease experts.
- BS or Masters in Electrical Engineering, Computer Engineering or related; or equivalent (minimum 12 years work experience). If Associate's Degree, must have equivalent minimum 6 years work experience
- 7 years of experience with FPGA/RTL design
- Proficient in Verilog coding for synthesis
- Demonstrated ability to analyze and debug FPGA firmware and related hardware issues
- Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.
- In depth working knowledge and experience with vendor specific FPGA tools (Vivado, Quartus, etc.)
- Circuit design experience in one or more of these areas: high speed differential circuits, microcontrollers, microprocessors, firmware, display engineering, digital signal processing, real-time image processing, camera modules, knowledge of CIS-2, MIPI C/D-PHY, I2C/I3C, and advanced interface standard
- Programming experience in C and/or C++
- Experience using industry standard FPGA tools to bring up initial system, integrate peripheral components, and test and debug design
- Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages
- Experience with agile RTL or HLS methodologies such as Vivado HLS, Catapult HLS, Chisel, PyMTL, Stratus HLS, or others
- Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
- BOOT Linux OS on top of the platform (FPGA)
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Unless expressly indicated, this role is not open in the State of Colorado.
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