FPGA Design Verification Staff Engineer

Whether at our Silicon Design Center in Phoenix or at one of our other locations you will get to collaborate and innovate with the world's leading product development companies. In our dynamic fast-paced environment you will get to make the impossible possible.

Accenture is invested in our team member's growth and provide many opportunities for training and skills expansion.

The FPGA Engineer will require:

• Hands on experience to write synthesizable RTL for FPGA based systems
• Integrating first-party and third-party IPs into a larger system and maintaining it through fast transitions
• Build vendor-neutral FPGA/RTL designs intended to prototype ASIC implementations
• Familiarity with Xilinx, Altera FPGA's ( ( Vivado , Quartus, etc.)
• Perform FPGA design verification and validation using advanced RTL verification techniques

• Design FPGA's through the life cycle including: Architecture development, micro architecture, algorithm implementation, synthesizable Verilog code generation
• Perform FPGA Design Implementation: Constraint driven FPGA Synthesis, place and route, static timing analysis and optimize FPGAs for timing closure
• Collaborate in a team environment across multiple engineering disciplines and with researchers
• Generate design review and deliverable documentation including review packages, block diagrams, interface control documents, test procedures, requirements verification matrices, and test plans/procedures
• Proficient in control and use of a variety of test equipment including Oscilloscopes, Spectrum Analyzers, and Signal Generators

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Qualifications

Here's what you need:

• Bachelor's Degree or equivalent (12 years) work experience (If an, Associate's Degree with 6 years of work experience)
• 3 years of experience with FPGA or RTL Design

Bonus Points If:

• Proficient in Verilog coding for synthesis
• Demonstrated ability to analyze and debug FPGA firmware and related hardware issues
• Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.
• In depth working knowledge and experience with vendor specific FPGA tools ( Vivado , Quartus, etc.)

• Circuit design experience in one or more of these areas: high speed differential circuits, microcontrollers, microprocessors, firmware, display engineering, digital signal processing, real-time image processing, camera modules, knowledge of CIS-2, MIPI C/D-PHY, I2C/I3C, and advanced interface standard
• Programming experience in C and/or C++
• Experience using industry standard FPGA tools to bring up initial system, integrate peripheral components, and test and debug design
• Programming experience in one or more scripting languages: Python, tcl , shell scripts, or equivalent EDA tool scripting languages
• Experience with agile RTL or HLS methodologies such as Vivado HLS, Catapult HLS, Chisel, PyMTL , Stratus HLS, or others

• Proven track record of successfully deploying FPGA solutions across production systems or research prototypes
• BOOT Linux OS on top of the platform (FPGA)

As required by theColorado Equal Pay Transparency Act, Accenture provides a reasonable range of minimum compensation for roles that may be hired in Colorado. Actual compensation is influenced by a wide array of factors including but not limited to skill set, level of experience, and specific office location. For the state of Colorado only , the range of starting pay for this role is $72,400 - $134,999 and information on benefits offered is here.

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