Design For Test (DFT) Staff Engineer
- Phoenix, AZ
As part of Accenture's Industry X, the Silicon Design group is a diverse team of world class silicon engineers. We have 100+ years of cumulative hands on experience in architecture, logic design, verification, physical design, emulation and firmware . We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture engineers are true "Silicon to SW" Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.
Whether at our Silicon Design Center in Phoenix or at one of our other locations you will get to collaborate and innovate with the world's leading product development companies. In our dynamic fast-paced environment you will get to make the impossible possible.
DFT Engineer professionals advise upon, design, develop and/or deliver technology solutions that support best practice business changes:
- Work with the Silicon teams to document the DFT specifications and define the requirements Develop and implement DFT architecture and infrastructure Develop and drive execution of enhanced DFX (DFT/Design-For-Debug) methodologies, with increased focus on debug support Work with the DV team to verify DFT implementations Generate structural test vectors, analyze and improve coverage/test time/test cost Work with designers on STA, physical, power and logical issues impacting DFT Work with test engineers to bring up test vectors on silicon Work with lab bring-up teams to bring up test vectors in the lab environment Manage schedules and support internal and external cross-functional/cross-organizational engineering efforts
Role open to Applicants all over the USA.
Racking up those air miles will have to wait, as weekly non-essential travel to client sites Monday through Thursday is currently suspended. For now, all Accenture business travel, international and domestic, is currently restricted to client-essential sales/delivery activity only.
Please note: The safety and well-being of our people continues to be the top priority, and our decisions around travel are informed by government COVID-19 response directives, recommendations from leading health authorities and guidance from a number of infectious disease experts.
- Minimum of 1 - 3 years of DFT experience:
- Industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- Developing DFT specifications
- Industry standard DFT and design tools
- Debugging ATPG/MBIST patterns
- STA constraints and their interaction with DFT
- Bachelor's Degree or equivalent (12 years) work experience (If an, Associate's Degree with 6 years of work experience)
- Experience with Synopsys DFT tools (Tetramax, DFT compiler, BSD compiler, Formality, Spyglass)
- Experience with JTAG and IEEE standards 1149.1 and 1149.6.
Applicants for employment in the US must have work authorization that does not now or in the future require sponsorship of a visa for employment authorization in the United States and with Accenture.
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Locations AZ - Phoenix,CA - San Jose
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